Firefly™
The Firefly is a board created for makers, companies, and students who want to create the next big thing.
Specs
Processor
Architecture
FPGA
RAM
FLASH
Ethernet
USB
MicroSD Card
Other interfaces
Dimensions
Power
Operating System
RISC-V configurable CPU
RISC
Lattice ECP5 (25K, 45K, or 85K LUTs)
64 MB SDRAM
16 MB FLASH
Ethernet Phy
USB 2.0 for Power and Data
MicroSD Card
Arduino header, GPIOs, etc.
Arduino UNO form factor
Barrel Jack / USB
Linux OS or RTEMS
Getting Started
Power
The Firefly can be powered using the Barrel Jack, USB port, or with a battery (optional). The power source is selected automatically.
Memory
The RISC-V has 256 KB of flash program memory (with 4 KB used for the bootloader). The bootloader is factory pre-burnt by Pixilica and is stored in a dedicated ROM memory.
Programming
The Firefly runs Debian Linux (or RTEMS or NodeOS) and it can be programmed with a GCC toolchain. The RISC-V IP Core embedded in the Lattice FPGA is fully Customizable (support for both FPU and MMU). The FPGA can be programmed using the Lattice toolchain and any IDE.
Documentation and tutorials
Documentation and tutorials available soon.